Highly integrated semiconductor circuits are increasingly important, particularly in producing battery-operated devices such as cell phones, portable computers, laptops, notebook computers, PDAs, wireless email terminals, MP3 audio and video players, portable wireless web browsers and the like, and these sophisticated integrated circuits increasingly include on-board data storage.
As is known in the art, to produce voltages within the integrated circuit that are required for reliable operation, high voltage pump circuits may be used. These circuits are often referred to as “charge pumps.” These charge pump circuits produce an output voltage greater than the supply voltage level by periodically charging a capacitor that is then positioned between the output and the supply voltage. When coupled to the output, the charged capacitor adds a DC level to the supply voltage, thereby producing a charge pump voltage output that is greater than the supply voltage. The pump circuit repeatedly charges the capacitor as it discharges to maintain a DC high voltage. Because there are time periods when the pump output is lower than desired (after the pumping capacitor is discharged), one known approach is to provide two charge pumps for supplying a voltage. The two pumps are used interchangeably by coupling the output of one pump to the pumped-up supply voltage node for a period, and then switching to couple the output of the other pump to the supply voltage node. Each pump is clocked with a time varying signal and recharges (“pumps”) the respective pumping capacitor between cycles. This approach also requires a pair of control switches, or transfer gates, that periodically couple their respective charge pump output to the pumped-up supply node.
The circuitry used in the transfer gate control circuit typically includes MOS transistors. Because the voltages that these MOS transistors are coupled to exceed the supply voltage, these MOS transistors are susceptible to gate stress reliability problems. Gate stress occurs when the voltage difference between the gate and the source/drain terminals of a MOS transistor exceeds certain rated limits. Gate stress reliability problems may be relieved somewhat by increasing the gate oxide thickness of the transistors used in these circuits to form a so-called “thick oxide” device, which increases the normal voltage ratings the devices can reliably operate with. However, even when additional process steps are used to form such thick oxide devices, reliability of the transistors subjected to the gate stress may remain an issue. As semiconductor processes continue to advance, and device sizes continue to shrink to the sub-micron level and below, these problems become more prevalent.
Thus, there is a continuing need for a transfer gate control voltage circuit with reduced gate stress and methods to produce the MOS transfer gate control circuits for high voltage applications in an integrated circuit. The improved gate control circuits need to be less susceptible to circuit reliability problems associated with gate stress.